C/C++ simulator for a (simple) RISC-V CPU

Create a (simple) C/C++ simulator for a (simple) RISC-V CPU.
Here are the important rules that we will use in all of these computer assignments:
● We will use the 32-bit version of RISC-V ISA.
● You should do all your work in the C/C++ programming language. Your code
should be written using only the standard libraries. You may or may not decide to
use classes and/or structs to write your code (C++ is preferred). Regardless of the
design, your code should be modular with well-defined functions and clear
comments.
● You are free to use as many helper functions/classes/definitions as needed in your
project.
● There is no restriction on what data type (e.g., int, string, array, vector, etc.) you
want to use for each parameter.
● Unfortunately, experience has shown that there is a very high chance that there
are errors in this project description. The online version will be updated as errors
are discovered, or if something needs to be described better. It is your
responsibility to check the website often and read new versions of this project
description as they become available.
● Sharing of code between students is viewed as cheating and will receive
appropriate action in accordance with University policy. You are allowed to
compare your results (only for the debug part) with others or discuss how to design
your system. You are also allowed to ask questions and have discussions on
Campuswire as long as no code is shared.
● You have to follow the directions specified in this document and turn in the files
and reports that are asked for.